Probabilistic timing verification and timing analysis for synthesis of digital interface controllers

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dc.contributor.author Escalante, Marco Antonio
dc.date.accessioned 2017-09-08T18:23:23Z
dc.date.available 2017-09-08T18:23:23Z
dc.date.copyright 1998 en_US
dc.date.issued 2017-09-08
dc.identifier.uri https://dspace.library.uvic.ca//handle/1828/8550
dc.description.abstract In this dissertation we present two techniques on the topic of digital interface design: a probabilistic timing verification and a timing analysis for synthesis, both rooted in a formal specification. Interface design arises when two digital components (e.g., a processor and a memory device) are to be interconnected to build up a system. We have extended a Petri net specification to describe the temporal behavior of the interface protocols of digital components. The specification describes circuit delays as random variables thus making it suitable to model process variations and timing correlation. Interface probabilistic timing verification checks that a subsystem, composed of components to be interconnected and the associated interface logic, satisfies the timing constraints specified by the components' specifications. Our verification technique not only yields tighter results than previous techniques that do not take timing correlation into consideration but also, if the timing constraint is not satisfied, determines the probability that a constraint will be violated. The second technique, timing analysis for synthesis, finds tight bounds on the delays of the interface logic, which are unknown prior to synthesis, such that all the timing constraints given in the component specifications are satisfied. en_US
dc.language English eng
dc.language.iso en en_US
dc.rights Available to the World Wide Web en_US
dc.subject Computer interfaces en_US
dc.subject Computer programs en_US
dc.subject Electronic controllers en_US
dc.title Probabilistic timing verification and timing analysis for synthesis of digital interface controllers en_US
dc.type Thesis en_US
dc.contributor.supervisor Dimopoulos, Nikitas J.
dc.degree.department Department of Electrical and Computer Engineering en_US
dc.degree.level Doctor of Philosophy Ph.D. en_US
dc.description.scholarlevel Graduate en_US

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