Speed Comparison of Binary Adders Techniques

Abstract

The search for developing techniques of a digital circuit that assist in minimizing the challenges that occur nowadays in microelectronics is continuous. Arithmetic circuits especially adder target of a continues e effort that presents an interesting research field. Since adder occupies a critical position in arithmetic circuits design, it is important to ensure that the performance of adder meets certain specifications. In this report, we introduce different fast adders topologies with focus on computation speed parameter. In addition, we provide delay modeling and simulation of the fast adders to check their performance using Matlab software environment. The main goal is to provide a comprehensive review of fast adders and some new techniques that have been applied to improve their performance.