Performance evaluation and router design for backtrack-to-the-origin-and-retry routing in hypercycle-based interconnection networks
| dc.contributor.author | Radvan, Don | en_US |
| dc.date.accessioned | 2024-08-15T17:36:56Z | |
| dc.date.available | 2024-08-15T17:36:56Z | |
| dc.date.copyright | 1990 | en_US |
| dc.date.issued | 1990 | |
| dc.degree.department | Department of Electrical and Computer Engineering | |
| dc.degree.level | Master of Applied Science M.A.Sc. | en |
| dc.description.abstract | Hypercycles are a class of multidimensional graphs which are generalizations of the binary n-cube. These graphs are obtained by allowing each dimension to incorporate two or more vertices and a cyclic interconnection strategy. Hypercycles offer simple routing and, the ability, given a fixed degree, to choose among a number of alternative size graphs. These graphs can be used in the design of interconnection networks for distributed computing systems tailored specifically to the topology of a particular application. Hypercycles use a routing policy, whereupon paths that block at intermediate nodes are abandoned and a new attempt is made using an alternate path. Intermediate nodes are chosen at random at each point from among the ones that form the shortest paths from a source to a destination. This thesis presents a computer-based simulator for simulating all such Hypercycle networks. The results of this simulator present a favourable comparison of the above-mentioned routing policy with that of e-cube routing in terms of overall message delay. Furthermore, the implementation of a Hypercycle router is discussed in detail and a partial design suitable for VLSI implementation is presented along with results from hardware simulations performed on this design. This is done to show that the space-time complexity of the system can be reduced to the point where realization in current technology is feasable. | |
| dc.format.extent | 153 pages | |
| dc.identifier.uri | https://hdl.handle.net/1828/19420 | |
| dc.rights | Available to the World Wide Web | en_US |
| dc.title | Performance evaluation and router design for backtrack-to-the-origin-and-retry routing in hypercycle-based interconnection networks | en_US |
| dc.type | Thesis | en_US |
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