The cost and fault coverage of unidirectional error detecting codes for concurrent checking in PLAs

dc.contributor.authorWessels, David Martinen_US
dc.date.accessioned2024-08-15T20:15:04Z
dc.date.available2024-08-15T20:15:04Z
dc.date.copyright1990en_US
dc.date.issued1990
dc.degree.departmentDepartment of Computer Science
dc.degree.levelMaster of Science M.Sc.en
dc.description.abstractThis thesis examines a number of concurrent checking techniques as applied to internally unate switching circuits: specifically programmable logic arrays (PLAs) . The techniques considered use unidirectional error detecting codes to detect all single internal faults in a PLA, and modifications to these techniques a reintroduced which also permit detection of primary input faults in PLAs. Evaluations of the techniques are carried out with respect to the overheads induced by each checking scheme, and also with respect to the fault coverage provided by each scheme for both single and multiple faults within the circuit. A PLA-based self-checking checker is also introduced, as is a classification scheme - PLA density - which provides a rough measure of PLA suitability for the different coding techniques examined. Finally, the possibility of using these techniques to combine interally-unate circuit components to form a circuit in which any single fault is detectable is considered.
dc.format.extent128 pages
dc.identifier.urihttps://hdl.handle.net/1828/20076
dc.rightsAvailable to the World Wide Weben_US
dc.titleThe cost and fault coverage of unidirectional error detecting codes for concurrent checking in PLAsen_US
dc.typeThesisen_US

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