VLSI design of improved logical neighborhood network

Simple item page
dc.contributor.authorShaikh, Anjumen_US
dc.date.accessioned2024-08-15T18:21:33Z
dc.date.available2024-08-15T18:21:33Z
dc.date.copyright2002en_US
dc.date.issued2002
dc.degree.departmentDepartment of Electrical and Computer Engineering
dc.degree.levelMaster of Applied Science M.A.Sc.en
dc.description.abstractIn the last few years the Internet and distributed computing has faced a spectacular growth. In the wake of the emerging telecommunications needs the Plain Old Tele­phone Systems (POTS) thus needed revolutionary steps to achieve economical and flexible networks. As a solution an optimum use of existing switching and transmission resources was achieved by integrating voice, data and multimedia applications within the same network. This solution was realized by applying packet switching tech­niques, which ultimately required data communication systems. The data communi­cation systems necessitated high transmission Bandwidth and differentiated services (Quality of Service - QoS) networks. In the R&D industry the BISDN (Broadband Integrated service Digital Network) had emerged as the promising solution to these requirements, and is already replacing existing application-oriented communication networks. The implementation of BISDN required development of network protocols, switch­ing nodes, and transmission systems which could support the diversity of BISDN ser­vices. The IP and ATM became the most popular high speed network protocols. The advances in fiber optics technology have made available huge amounts of transmis­sion bandwidth. Thus, in current networks the main cause of bottleneck is now due to the processing in the routers rather than the bandwidth of the transmission me­dia. A switch design capable of supporting IP & ATM technology essentially requires a switching fabric within itself to effectively perform its functions. Any proposed switching fabric design must have high Quality of Service (QoS) capabilities and can support high data transfer rates to meet the performance requirements. One promis­ing high speed switching fabric is the Improved Logical Neighborhood Network (ILN), which outperforms many other switching fabric architectures. In this thesis, a design of ILN network and its hardware implementation is pre­sented. The thesis first surveys different switching fabric architectures, with descrip­tion of ILN network, and then compares the performance analysis of various networks. The proposed design for ILN network specifies hardware details and signaling conven­tions used. The hardware specifications elaborates the hierarchical modules of design, comprising of a modular Switching Element (SE) node. The SE is an independent switching processor having all the desirable features such as distributed-routing (self ­routing) using built-in routing algorithm, path uniqueness for each source-destination pair, and suitability for VLSI implementation. In this work the hardware of ILN network is realized in the Field programmable Gate Array (FPGA) integrated circuit . The target technology applied is from Xilinx Virtex-II family. The functions of ILN network are demonstrated and verified by using simulation and synthesis Electronic Design Automation (EDA) tools. In the end of thesis the results of ILN network's hardware implementation are shown and discussed.
dc.format.extent114 pages
dc.identifier.urihttps://hdl.handle.net/1828/19638
dc.rightsAvailable to the World Wide Weben_US
dc.titleVLSI design of improved logical neighborhood networken_US
dc.typeThesisen_US

Files

Original bundle
Now showing 1 - 1 of 1
Thumbnail Image
Name:
SHAIKH_Anjum_MASC_2002_1275266.pdf
Size:
36.42 MB
Format:
Adobe Portable Document Format
Download

Collections

Electronic Theses and Dissertations (ETD)
 
University of Victoria Libraries

We acknowledge and respect the Lək̓ʷəŋən (Songhees and Esquimalt) Peoples on whose territory the university stands, and the Lək̓ʷəŋən and W̱SÁNEĆ Peoples whose historical relationships with the land continue to this day.