Fixed-point hardware design for CPWC image reconstruction

Date

2020-03-27

Authors

Shi, Ji

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Abstract

Coherent plane-wave compounding (CPWC) ultrasonography is an important imaging modality that allows for very high frame rates. During CPWC image reconstruction, computationally expensive delay-and-sum beamforming can be replaced by faster Fourier-domain remapping. The thesis deals with the MATLAB and hardware implementation of one of the recently proposed Fourier-domain CPWC reconstruction methods, namely, plane-wave (PW) Stolt's migration algorithm. We first present the floating- and fixed-point implementations of the said migration algorithm in MATLAB, and then perform quantitative evaluation of the reconstruction results, showing that it is feasible to obtain high-quality compounded images using hardware-oriented scaled fixed-point calculations, as opposed to more expensive software-oriented floating-point arithmetic. We also generate Xilinx FPGA-based implementations of both floating- and fixed-point MATLAB-based algorithms, using a high-level synthesis (HLS) design flow that collaboratively employs MATLAB Coder and Vivado HLS tool. MATLAB Coder can automatically convert a MATLAB code into a C program, while Vivado HLS can convert the resulting C program into a synthesizable Verilog/VHDL description. Results show that our fixed-point FPGA implementation is more resource and power efficient and can also operate at a higher clock frequency compared to its floating-point counterpart.

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Keywords

Plane-wave ultrasound imaging, Fixed-point computation, FPGA implementation

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