FPGA Implementation of Crossover Module of Genetic Algorithm
| dc.contributor.author | Attarmoghaddam, Narges | |
| dc.contributor.author | Li, Kin Fun | |
| dc.contributor.author | Kanan, Awos | |
| dc.date.accessioned | 2019-07-15T22:19:02Z | |
| dc.date.available | 2019-07-15T22:19:02Z | |
| dc.date.copyright | 2019 | en_US |
| dc.date.issued | 2019 | |
| dc.description.abstract | This paper proposes a hardware realization of the crossover module in the genetic algorithm for the travelling salesman problem (TSP). In order to enhance performance, we employ a combination of pipelining and parallelization with a genetic algorithm (GA) processor to improve processing speed, as compared to software implementation. Simulation results showed that the proposed architecture is six times faster than the similar existing architecture. The presented field-programmable gate array (FPGA) implementation of PMX crossover operator is more than 400 times faster than in software. | en_US |
| dc.description.reviewstatus | Reviewed | en_US |
| dc.description.scholarlevel | Faculty | en_US |
| dc.description.sponsorship | Funding: This research was funded by Natural Sciences and Engineering Research Council of Canada: Discovery grant number 36401. | en_US |
| dc.identifier.citation | Attarmoghaddam, N., Li, K.F. & Kanan, A. (2019). FPGA Implementation of Crossover Module of Genetic Algorithm. Information, 10(6), 184. https://doi.org/10.3390/info10060184 | en_US |
| dc.identifier.uri | http://dx.doi.org/10.3390/info10060184 | |
| dc.identifier.uri | http://hdl.handle.net/1828/10963 | |
| dc.language.iso | en | en_US |
| dc.publisher | Information | en_US |
| dc.subject | genetic algorithm | |
| dc.subject | crossover | |
| dc.subject | FPGA | |
| dc.subject | TSP | |
| dc.subject.department | Department of Electrical and Computer Engineering | |
| dc.title | FPGA Implementation of Crossover Module of Genetic Algorithm | en_US |
| dc.type | Article | en_US |