Butterfly PUFS: Securing FPGA Intellectual Property
| dc.contributor.author | Pandit, Sayali | |
| dc.contributor.supervisor | Papadopoulos, Chris | |
| dc.contributor.supervisor | Sima, Mihai | |
| dc.date.accessioned | 2024-06-18T19:08:38Z | |
| dc.date.available | 2024-06-18T19:08:38Z | |
| dc.date.issued | 2024 | |
| dc.degree.department | Department of Electrical and Computer Engineering | |
| dc.degree.level | Master of Engineering MEng | |
| dc.description.abstract | This report delves into the creation, implementation, and assessment of the Butterfly Physical Unclonable Function (BPUF) in FPGA systems, with an aim to fortify hardware security. By exploiting natural circuit behavior variations, the BPUF generates unique, indeterminable cryptographic keys, offering solid protection against tampering and reverse engineering. The study initiates with an extensive review of current PUF technologies, emphasizing memory-based PUFs and their role in hardware security. During the implementation stage, the report outlines the configuration and results of both 1-bit and 8-bit BPUF settings. Experimental findings affirm the BPUF’s capability to produce distinctive, reproducible outputs, essential for dependable security implementations. Performance assessments employing Hamming distance metrics further evaluate the stability and uniqueness of BPUF outputs across different scenarios, highlighting their applicability in effective security systems. The report wraps up with considerations for future research, including the exploration of hybrid and more complex PUF designs to transcend existing barriers and augment security measures. The study makes significant contributions to hardware security, suggesting novel strategies to shield digital infrastructures from advanced threats. | |
| dc.description.scholarlevel | Graduate | |
| dc.identifier.uri | https://hdl.handle.net/1828/16626 | |
| dc.language.iso | en | |
| dc.rights | Available to the World Wide Web | |
| dc.subject | Butterfly Physical Unclonable Functio (BPUF) | |
| dc.subject | FPGA systems | |
| dc.title | Butterfly PUFS: Securing FPGA Intellectual Property | |
| dc.type | project |