Design of current-mode building blocks and their application in A/D conversion

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dc.contributor.authorSarao, Jasbiren_US
dc.date.accessioned2024-08-15T18:19:03Z
dc.date.available2024-08-15T18:19:03Z
dc.date.copyright2000en_US
dc.date.issued2000
dc.degree.departmentDepartment of Electrical and Computer Engineering
dc.degree.levelMaster of Applied Science M.A.Sc.en
dc.description.abstractAs the trend towards single chip systems grows with the development in the VLSI field, the analog circuits are required to have small size, low power supply and wide dynamic range. Current mode circuits are reported to be advantageous as compared to voltage mode circuits. Moreover, current mode circuits are easily realisable with any standard digital CMOS process. The research work done in t his thesis can be divided into two parts . The first part is a study of the basic building blocks required in the design of current mode circuits. These blocks are current mirrors, a current comparator , a current amplifier, a current reference circuit , and a voltage to current converter. The second part begins with the design of a one bit cell , used for designing an analog to digital converter. Two bit and 8 bit analog to digital converters are then designed and simulated, using the one bit cell. The first part of the research was primarily focussed on the design and error analysis of current mirrors. Cascode current mirror and regulated cascode current mirror are designed with 9 bit accuracy and response of 200 MHz. Design of an improved and optimized current mirror is presented. This optimized current mirror has an accuracy of 15 bits and a speed higher than 400 MHz for low input currents and higher than 600 MHz for high input currents. The design of other current mode building blocks such as a current comparator , a current amplifier, and a current reference circuit are presented. The second part of the research is focussed on the application of current mode building blocks in the design of an analog to digit al converter. A one bit cell is designed for both low and high input currents. The one bit cell operates at 18 MHz for low input currents and 50 MHz for high input currents. A two bit and an 8 bit analog to digital converter have been designed by cascading two and eight one bit cells respectively. Simulation results are presented which verify and validate the operation of a two bit and an 8 bit analog to digital converter for low input currents. The 8 bit analog to digital converter operates at 2.25 MHz. All the simulations were done using Spectre simulator under Cadence environment .
dc.format.extent107 pages
dc.identifier.urihttps://hdl.handle.net/1828/19568
dc.rightsAvailable to the World Wide Weben_US
dc.titleDesign of current-mode building blocks and their application in A/D conversionen_US
dc.typeThesisen_US

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