Digital bit synchronization of hard limited binary data
Date
1988
Authors
Ogmundson, Patrick Gerard
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Abstract
Three new digital bit synchronization techniques are presented. Each synchronizer uses a hard limiter to interface between the received analog data waveform and the digital synchronizer.
The optimum maximum likelihood synchronizers ( data aided and non data aided) for hard limited data signals are developed. Linear approximations are made to these optimum synchronizers to simplify implementation. The lower bound on the timing error variance of the hard limited data aided synchronizer is established.
A zero crossing tracking digital phase locked loop (PLL) suitable for bandlimited data transmission systems is proposed. Pattern jitter (self noise) is reduced by a pattern jitter compensation signal in the PLL feedback, thus eliminating the need for a prefilter. The timing jitter variance analysis is shown to be an improvement over a previous result for a zero crossing tracking PLL. Computer simulations and laboratory experiments verify the performance of the pattern jitter compensation technique.
A PLL synchronizer with a simple adaptive bandwidth control is shown to yield a better acquisition/tracking performance tradeoff than a fixed bandwidth PLL. The adaptive bandwidth control operates by monitoring the location of zero crossings measured at the output of a phase detector. Computer simulation and experimental results for some typical PLL parameters are presented.