The application of current mode circuits in the design of an A/D converter
Date
1997
Authors
Li, Minghong
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Abstract
With the fast development of telecommunications, more and more VLSI chips are required to have small size, low power supply and wide dynamic range. Systems which include analog and digital circuits can be integrated on the same chip using the standard digital CMOS technology. Voltage mode circuits face the problems both in economic and technique. Current mode technique attracts researchers' attention because of its advantages over the voltage mode technique.
The research in this thesis can be divided into two parts. The first part is on the study of one of the basic building blocks in current mode technique, namely, the dynamic current mirror. The second part is on the analysis and design of a pipeline stage used in an 8-bit current mode AID converter.
The research on the dynamic current mirror primarily focused on error analysis, as well as circuit design. Several methods to reduce the errors are presented. Regulated-cascade dynamic current mirror is adopted in this work. An 8-bit current mode AID converter is based on multistage and pipeline architecture. Each stage completes one 2-bit conversion. Because of this structure, the speed of the circuit is increased. Since the circuit in each stage is the same, a module has been designed and used for every stage. The research on the pipeline stage begins with the analysis and design of subsystem circuit blocks. Some of them are based on another current mode circuit - adaptive bias cascade current miITor. Each circuit block in the pipeline stage was simulated using Spectre within Cadence graphics. One channel of the converter was simulated and it is capable of 8-bit resolution and 355 kHz conversion rate. If 7 parallel channels are used, the sampling rate can be increased to 2.5 MHz.